Shirish Koirala

The Simple-As-Possible (SAP)-1 computer is a very basic model of a microprocessor explained by Albert Paul Malvino. The SAP-1 design contains the basic necessities for a functional Microprocessor. Its primary purpose is to develop a basic understanding of how a microprocessor works, interacts with memory and other parts of the system like input and output. The instruction set is very limited and is simple. The features in SAP-1 computer are: W bus – A single 8 bit bus for address and data transfer.  16 Bytes memory (RAM)  Registers are accumulator and B-register each of 8 bits.  Program counter – initializes from 0000 to 1111 during program execution.  Memory Address Register (MAR) to store memory addresses.  Adder/ Subtracter for addition and subtraction instructions.  A Control Unit  A Simple Output.  6 machine state reserved for each instruction  The instruction format of SAP-1 Computer is (XXXX) (XXXX) A Simple animation to demonstrate the working of SAP I:

Some commonly used compiler-construction tools include: Parser generators that automatically produce syntax analyzers from a grammatical description of a programming language.  Scanner generators that produce lexical analyzers from a regular-expression description of the tokens of a language.  Syntax-directed translation engines that produce collections of routines for walking a parse tree and generating intermediate code.  Code-generator generators that produce a code generator from a collection of rules for translating each operation of the intermediate language into the machine language for a target machine.  Data-flow analysis engines that facilitate the gathering of information about how values are transmitted from one part of a program to each other part. Data-flow analysis is a key part of code optimization.  Compiler-construction toolkits that provide an integrated set of routines for constructing various phases of a compiler