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SAP-1(Simple as Possible-1) Computer Architecture Introduction

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The Simple-As-Possible (SAP)-1 computer is a very basic model of a microprocessor explained by Albert Paul Malvino. The SAP-1 design contains the basic necessities for a functional Microprocessor. Its primary purpose is to develop a basic understanding of how a microprocessor works, interacts with memory and other parts of the system like input and output. The instruction set is very limited and is simple.

The features in SAP-1 computer are:

  • W bus – A single 8 bit bus for address and data transfer. 
  • 16 Bytes memory (RAM) 
  • Registers are accumulator and B-register each of 8 bits. 
  • Program counter – initializes from 0000 to 1111 during program execution. 
  • Memory Address Register (MAR) to store memory addresses. 
  • Adder/ Subtracter for addition and subtraction instructions. 
  • A Control Unit 
  • A Simple Output. 
  • 6 machine state reserved for each instruction 
  • The instruction format of SAP-1 Computer is (XXXX) (XXXX)
A Simple animation to demonstrate the working of SAP I:

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